Visual SPI : 8-bit, MSB-first, Master mode, SPI in MODE 0 [CPOL = 0, CPHA = 0] 3-wire Implementation

2012.05.19 : Frank Pelliccio : Initial version

*** Write Only - does not implement DI / MISO! ***

This configuration supports an optional 4th signal called Sync. Without using Sync, /SS will
be active [low] when the screen is blanked.

See visualSPI.js for more information

Pressing a key will display the MSB-first Visual SPI sequence with 100ms clock speed